1. Field of the Invention
The present invention relates to a data processing system including a plurality of devices, in which data processings are performed in the devices in accordance with a program or programs.
2. Description of the Related Art
For having better understanding of the concept underlying the present invention, description will first be made of a conventional data processing system known heretofore. FIG. 6 of the accompanying drawings is a schematic diagram for illustrating, by way of example, data processing executed by a conventional data processing system by taking as example the addition of "3" a given augend. In that case, instructions mentioned below are executed as the arithmetic processings involved in the addition of "3".
0000 LOAD H, 3 . . . place "3" in an H-register of a CPU of the data processing system. PA1 0001 LOAD 0100, H . . . transfer the data placed in the H-register to a memory at an address "100" thereof. PA1 0002 IN L, 0200 . . . transfer augend data to an L-register of the CPU from an input/output unit having an address "200". PA1 0003 ADD H, L . . . add together the data stored in both the H-register and the L-register, whereon a sum data resulting from the addition is placed in the H-register. PA1 0004 LOAD 0101, H . . . transfer the sum data of the H-register to the memory at the address "101" thereof. PA1 0005 OUT 0200, H . . . transfer the data of the H-register incorporated in the CPU to the input/output unit having the address "200".
As can be seen from the above elucidation, in any processing step, the data necessarily undergoes the processing executed by the CPU (Central Processing Unit), which in turn means that the processing speed of the data processing system depends on the processing speed or capability of the CPU incorporated in the data processing system. To say in another way, the processing speed of a data processing system is inevitably determined by the processing capability or speed of the CPU, thus giving rise to a problem.